Diffusion - Semiconductor Device Fabrication

The main objective of diffusion is to change the type and level of conductivity of semiconductor materials so as to form bases, emitters and collectors of bipolar junction transistor and gates, sources and drains of metallic oxide semiconductor devices.

Diffusion is also used to dope polysilicon materials to form resistors and interconnects.
There are two types of diffusion which are:

1.   Substitutional Diffusion: This is a type of diffusion whereby impurity atoms diffuse by moving from a lattice site to a neighbouring one by substituting for a silicon atom which has vacated a usually occupied site.

2.   Interstitial Diffusion: This is a type of diffusion whereby heavy metal ions occupy the interstitial voids present in silicon lattice. It helps to reduce carrier lifetimes.

Diffusion depends on the following:

1.   Lattice Environment
2.   Geometry of Parent Semiconductor
3.   Concentration of Gradient of Impurities
4.   Physical Properties of a Particular Impurity

Fick's First Law

This is an equation describing the flow of an impurity into a substance showing that the flux of the material across a given plane is proportional to the concentration gradient across the plane.
Equation:  J = -D∂N(x, t) / ∂x
The negative sign shows that the flow is in the direction of decreasing concentration.
From the equation:

N  =  Density of Concentration of Impurities
D  =  Diffusion Coefficient
∂N/∂x  =  Concentration Gradient
x  =  Co-ordinate axis in the direction of impurity flow
t  =  Diffusion Time

Fick's first law is not an adequate description of the diffusion process since the concentration gradient of an impurity in a finite volume of material decreases with time.

Fick's Second Law

From the conservation of matter, this law states that the change in impurity concentration over time is equal to the change in local decrease of diffusion flux.
Equation:  ∂N(x, t)/∂t = -∂J(x, t)/∂x

There are two types of boundary conditions for modeling impurity diffusion in silicon which are:

1.   Constant - Source Diffusion: This is a boundary condition whereby the surface concentration is held constant throughout the diffusion.
2.   Limited - Source Diffusion: This is a boundary condition whereby a fixed quantity of the impurity is deposited on a thin layer on the surface of the silicon.

Planar Diffusion From a Constant Source of Dopants

In planar type of diffusion, dopants are deposited or introduced on to the surface of a hot silicon slice.
The dopants are allowed to diffuse into the material whereas the amount of dopant at the surface is being maintained at a constant level throughtout the diffusion.
This type of diffusion is called complementary error function diffusion.
Therefore, a constant source results in a complementary error function impurity distribution.
As time progresses, the diffusion proceeds further into the wafer with the surface concentration remaining constant.
The total number of impurities atoms per unit area in the silicon is called DOSE, Q (atoms/cm²).
The dose is directly proportional with time (Q increases with time) and an external impurity source must supply a continuous flow of impurity atoms to the surface of the wafer.
In constant source diffusion, there is a high surface concentration and for this reason it is used for emitter type diffusion.

Two - Step Diffusion

This is a diffusion whereby the impurity concentration and profile can be carefully controlled.
In step one, the deposition stage, a constant source diffusion is carried out for a short time usually at a relatively lower temperature (1000°C).
In step two, the drive-in stage, the impurity supply is shut off and the existing dopant is allowed to diffuse onto the body of the semiconductor which is now held at a higher temperature (1200°C) in an oxidizing atmosphere.
The oxide layer which is formed during this stage prevents impurities from entering and the ones deposited from diffusing out.

The final impurity profile is a function of factors such as temperature, time and diffusion coefficient for each step.

Junction Formation

The goal of most diffusions is to form pn junctions by converting p - type material to n - type material or vice versa.

The point at which the diffused impurity profile intersects the background concentration is the metallurgical junction depth.
The net impurity concentration at the metallurgical junction depth is zero. The material to the left of the metallurgical junction depth is the p - type while to the right is the n - type.

Diffusion of dopants is carried out in electric furnace tubes using solid, liquid or gaseous sources.

In a solid source doping system, carrier gases (N₂ or O₂) flow at a controlled rate over a source boat placed in the furnace tube. The carrier gases picks up vapour from the source and transports it down the tube where dopant is deposited on the wafer. Solid Boron and Phosphorus impurity sources are available in wafer form and are placed in a quartz boat in the furnace.

In liquid source systems, a carrier gas passes through a bubble where it picks up the vapour of the liquid source. The gas carries the vapour into the furnace tube where it reacts with the surface of the silicon wafer.

In gas source systems, the dopants are supplied directly to the furnace tube in the gaseous state.

Note that common gas sources are toxic and purging, trapping systems are used to ensure that all the source gas is removed from the furnace before wafer removal.

Commonly used p - type dopants used for p - type diffusion is boron. Gallium and Aluminium are not used because they have a very high diffusion coefficient in silicon dioxide, Indium is also not used because it does not produce holes easily at room temperature.

Equations:

Solid Source of Boron: 2B₂O₃ + 3Si <=> 4B + 3SiO₂
Liquid Source of Boron: 4BBr₃ + 3O₂ => 2B₂O₃ + 6Br₂
Gaseous Source of Boron: B₂H₆ + 3O₂ => B₂O₃ + 3H₂O

Commonly used n - type dopants used for n - type diffusion are antimony, phosphorus and arsenic

Equation:
Solid State of Phosphorus: 2P₂O₅ + 5Si => 4P + 5SiO₂

Gold is often diffused into silicon wafers to enhance the recombination rate and so increase the switching speed of active devices.