The two values of forward voltages are the peak point voltage and the valley point voltage.
Conventionally, an ordinary diode exhibits positive resistance when it is forward biased or reverse biased.
In the case where a semiconductor junction diode is heavily doped with impurities it exhibits negative resistance between the peak point voltage and valley point voltage, such a diode is a tunnel diode.
.
Negative resistance simply means a situation where voltage is not directly proportional to current. In other words an increase in voltage leads to a decrease in current.
Basically, a tunnel diode is a pn junction with heavy doping of n - type and p - type semiconductor materials.
Now, this heavy doping gives rise to a large number of majority carriers which the results to many of this carriers not used during recombination thereby creating a very narrow depletion layer.
The Tunneling Effect:
As stated above the large number of majority carriers are not used in recombination which then causes much drifting in the p and n sections.
For the fact that many majority carriers are not used during recombination, it causes many valence electrons to have their energy levels raised to the conduction region.
Therefore, a very small applied voltage causes conduction to take place and since the depletion layer is very narrow, current easily pass through it.
Tunneling therefore, is the motion of valence electrons from the valence band to the conduction band with little or no applied voltage.
This simply implies that valence electrons easily travel through the forbidden gap.
As the voltage is applied to the tunnel diode, the current rapidly rises and this continues till the peak point voltage is attained.
When the peak point voltage is attained, as one applies voltage the current decreases and at this point the tunnel diode defies Ohm's law. This region is known as the Negative Resistance Region.
This negative resistance continues until the valley point is reached and when the valley point is reached the tunnel switches back to behaving according to Ohm's law. Therefore, as one applies voltage, the current increases too.
From the tunneling effect, one could easily observe that the tunnel diode when operated in the negative resistance can be used as an oscillator or switch.
Note that a tunnel diode has a high reverse current.
A Tunnel Diode
A Tunnel Diode Symbol
Regions of Tunneling Effect
An Oscillator in lay man's terms is just a signal generator. A device that generates signal.
A tunnel diode can be used for oscillation when operated in its negative resistance region.
A Tunnel Diode Oscillator
From the diagram above, a tank circuit is the RLC circuit. When the tank circuit is set into oscillation by applying voltage without the tunnel diode a damped oscillation is produced.
This is where application of a tunnel diode is very important. If a tunnel diode is placed in series with the tank circuit and biased at the centre of the negative resistance region, undamped oscillations are produced as you can see in the diagram above.
This is possible because the negative resistance characteristics of the tunnel diode suppresses or rather counteracts the positive characteristics of the tank (RLC) circuit.
Tunnel diode oscillator can also be called negative resistance oscillator.
The tunnel diode oscillator has one big setback which is that it does not work efficiently at low frequencies.
Although the tunnel diode does not work well or efficiently at low frequencies, it does work well at high frequencies.
A Zener Diode
Conventionally, an ordinary diode operated in the reverse breakdown voltage is destroyed due to excessive current but this does not happen to the Zener diode.
A Zener Diode Symbol
A Zener diode is properly doped to reduce/maintain the reverse breakdown voltage, the doping also leads to a very thin depletion layer.
As a result of the very thin depletion layer, a Zener diode has a sharp reverse breakdown voltage, Vz
Reverse Characteristics of a Zener Diode:
Two things occur when Vz is reached which are:
1. The diode current increases rapidly.
2. The reverse voltage, Vz across the diode remains constant.
No matter what the value of current is the Zener voltage is relatively constant. This makes it possible for a Zener diode to be used as a voltage stabilizer.
A Zener diode is always reverse biased as it is always reverse connected, when it is forward biased, it behaves as an ordinary diode.
The Zener diode does not get destroyed once it enters the breakdown region as long as the external circuit connected to the diode limits the diode current to less than burn out value, the diode will not burn out.
If the applied voltage, V is greater than or equal to the Zener voltage, Vz, the Zener diode is in 'ON' state.
If the applied voltage, V is less than the Zener voltage, Vz but greater than zero, the Zener diode is in 'OFF' state.
Zener Diode as a Voltage Stabilizer
The Zener diode of Zener Voltage, Vz is connected across the load RL across which the output is desired.
The series resistance R absorbs the output voltage fluctuations so as to maintain constant voltage across the load.
The constant voltage, Vz is maintained across the load as long as the input voltage does not fall below Vz.
The excess voltage is dropped across the series resistance, R. This causes an increase in the value of total current, I.
The Zener diode will conduct the increase in I while the load current remains constant..
Therefore, the output voltage remains constant irrespective of the changes in the input voltage.
Equations Based on Zener Diode:
Voltage Drop Across R = Ei - Eo
Current through R, T = Iz + IL
R = (Ei - Eo) / (Iz + IL)
A circuit in which the waveform of an applied signal is shaped or removed (clipped) is known as a clipping circuit.
Biased positive clipping is the process of removing a small portion of the positive half cycle of the signal voltage.
Biased Positive Clipper
Operation of the Biased Positive Clipper:
During
the positive half cycle, the diode conducts heavily as long as the
input voltage is greater than +V. The output remains at +V so long as
the input voltage is greater than +V.
During the period the input voltage is less than +V, the diode is reverse biased and behaves as an open circuit.
Therefore, most of the input voltage appears across the output.
In this way, the biased positive clipper removes the input voltage above +V.
During the negative half cycle of the input voltage, the diode remains reverse biased.
Therefore, almost the entire negative half cycle appears across the load.
As stated earlier, a circuit with which the waveform of the applied signal is shaped or removed is known as a clipping circuit.
A biased negative clipping circuit is a circuit that removes a small portion of the negative half cycle of the signal voltage.
Biased Negative Clipper
In a JFET, the current conduction is either by electrons or holes and is controlled by means of an electric field between the gate electrode and the conducting channel of the device.
Note that the JFET has a high input impedance and a low noise level (because there are no junctions as in an ordinary transistor, conduction is through an n - type or p - type semiconductor material).
The three terminals of a JFET are:
1. Gate
2. Drain
3. Source
The voltage betwee the gate and the source is such that the gate is reverse biased and the drain and source terminals are interchangeable
It is worthy to note the following points:
1. The input circuit (gate to source) of a JFET is reversed biased which means that the JFET has a high input impedance.
2. The drain is so biased with the source that the drain current ID flows from the source to drain.
3. In all JFETs, source current IS is equal to the drain current ID.
4. The input voltage (VGS) controls the output current.
5. JFET is not subjected to thermal runaway when temperature increases, the drain current (ID) is controlled by the changing channel width.
Working Principle of a Junction Field Effect Transistor (JFET)
The two pn junctions at the sides of a JFET form the two depletion layers and the conduction by charge carriers (ie free electrons because we are dealing with n - channel JFET) is through the channel between the two depletion layers and out of drain.
The width and hence the resistance of this channel can be controlled by changing the input voltage, VGS. The greater the reverse voltage VGS, the wider the depletion layers and the narrower the conduction channel.
The narrower the conduction channel means greater resistance and hence source to drain current decreases while the wider the conduction channel means lesser resistance and hence source to drain current increases.
Therefore, the JFET operates on the principle that width and hence resistance of the conducting channel can be varied by changing the reverse voltage, VGS.
In other words, the magnitude of the drain current, ID can be changed by altering VGS.
When a voltage, VDS is applied between drain and source terminals and voltage on the gate is zero, the two pn junctions at the sides of the bar establishes depletion layers. The electrons will flow from source to drain through a channel between the depletion layers. The size of these layers determines the width of the channel and hence the current conduction through the bar.
If the reverse voltage, VGS is continuously increased, a state is reached when two depletion layers touch each other and the channel is cut off. Under such conditions, the channel becomes a non conductor (insulator).
Differences Between JFET (Junction Field Effect Transistor) and BJT (Bipolar Junction Transistor)
JFET
1. Unipolar transistor
2. Voltage controlled device
3. Its terminals are gate, source and drain
4. Its input circuit is reverse biased
5. It has a high input impedance
6. No current enters the gate of a JFET
7. Noise level is very small
8. Its gain is characterised by transconductance which is ratio of change in output current (ID) to input voltage (VGS).
BJT
1. Bipolar transistor
2. Current controlled device
3. Its terminals are emitter, base and collector
4. Its input circuit is forward biased
5. It has a low input impedance
6. Few currents enter into the base of a BJT
7. Noise level is moderate
8. Its gain is characterised by current gain
The curve between the drain current (ID) and drain source voltage (VDS) of a JFET at constant gate source voltage (VGS) is known as the output characteristics of a JFET.
Note that at first, the drain current (ID) rises rapidly with the drain source voltage (VDS) but then becomes constant. The drain source voltage above which the drain current becomes constant is known as PINCH OFF VOLTAGE.
After pinch off voltage the channel width becomes so narrow that depletion layers almost touch each other and the drain current passes through the small passage between these layers. Thus, increase in drain current is very small with VDS above pinch off voltage. Consequently the drain current (ID) remains constant.
JFET
can be applied as an amplifier. A small change in the reverse bias on
the gate produces a large change in drain current. Therefore, this makes
a JFET capable of raising the strength of a weak signal.
Operation of a JFET as an amplifier
During the positive half cycle of the input signal, the reverse bias voltage on the gate decreases which increases the channel width and hence the drain current.
During the negative half cycle of the input signal, the reverse bias voltage on the gate increases which decreases the channel width and hence the drain current.
The result is that a small change in the voltage at the gate produces a large change in drain current. These large variations in drain current produces large output across the load RL.
In summary, this is how a JFET (Junction Field Effect Transistor) acts an amplifier.
There are several parameters describing a JFET but am going to present these:
1. Shorted Gate Drain Current (IDSS)
2. Pinch Off Voltage (VP)
3. Gate Source Cut Off Voltage VGS(off)
4. a.c. Drain Resistance
5. Transconductance
6. Amplification Factor
Shorted Gate Drain Current (IDSS)
This is the drain current with source short circuited to gate (ie VGS = 0) and drain voltage (VDS) equal to the pinch off voltage. This is sometimes called Zero Bias Current. When VDS is increased beyond VP, the depletion layers expand at the top of the channel. The channel therefore, now acts as a current limiter and holds drain current constant at IDSS.
Note that since IDSS is measured under shorted gate conditions. It is the maximum drain current that one can get with normal operation of JFET.
There is a maximum drain voltage VDS(max) that can be applied to a JFET. If the drain voltage exceeds VDS(max) the JFET would breakdown.
The region between VP and VDS(max) is called constant current region or active region. In active region, JFET behaves as a constant current device. For proper working of JFET it must be operated in the active region.
Pinch Off Voltage (VP)
This is the maximum drain source voltage at which the drain current becomes essentially constant.
Gate Source Cut Off Voltage VGS(off)
This is the gate source voltage where the channel is completely cut off and the drain current becomes zero.
VGS(off) will always have the same magnitude value as VP. For Example if VP = 6V, VGS(off) = -6V.
a.c. Drain Resistance
This is the ratio of change in drain source voltage (ΔVDS) to the change in drain current (ΔID) at a constant gate source voltage
Equation ===> ΔVGS/ΔID at constant VGS
Transconductance
This is the ratio of the change in drain current (ΔID) to the change in gate source voltage (ΔVGS) at constant drain source voltage.
Equation ===> ΔID/ΔVGS at constant VDS
Amplification Factor
This is the ratio of change in the drain source voltage (ΔVDS) to the change in the gate source voltage (ΔVGS) at constant drain current.
Amplification factor of a JFET indicates how much control the gate voltage has over drain current than the drain voltage.
Equation ===> ΔVDS/ΔVGS
It is worthy to note this equations
ID = IDSS(1 - (VGS/VGS(off)))²
gm = gmo[1 - (VGS/VGS(off))]²
gmo = 2IDSS/|VGS(off)|
There are two basic types of JFET biasing which are:
1. Bias Battery
2. Biasing Circuit
Bias Battery
This method is also called a gate bias. The battery voltage, VGG ensures that gate source junction remains reverse biased. In this gate bias method there is no gate current therefore there will be no voltage drop across RG. It is also known as a fixed biasing circuit.
Biasing Circuit
The biasing circuit uses the supply voltage VDD to provide the necessary bias.
There are two commonly used methods which are:
1. Self Bias
2. Potential Divider Bias
Self Bias
In self bias the resistor, RS is the bias resistor. The d.c. component of drain current flowing through RS produces the desired bias voltage.
Voltage across RS, VS = IDRS
Since the gate current is negligibly small, the gate terminal is at d.c. ground is VG = 0.
VGS = VG - VS
= 0 - VS
= -IDRS
Thus bias voltage VGS keeps gate negative with respect to source.
Midpoint - Bias: When a signal is applied, the midpoint bias allows a maximum current of drain current swing between IDSS and 0. It can be proved that when VGS = VGS(off)/3.4, midpoint bias conditions are obtained.
Potential Divider Bias
The resistors R1 and R2 forms a voltage divider across drain supply, VDD. The circuit is so designed that IDRS is larger than V2 so that VGS is negative which provides the correct bias voltage.
V2 = VG = VDD(RS)/(R1 + R2)
V2 = VGS + IDRS
VGS = V2 - IDRS
The biasing circuit provides good stability of the operating points.
There are 3 basic connections of a JFET which are:
1. Common Source Connection
2. Common Drain Connection
3. Common Gate Connection
Common Source Connection
This is the most widely used connection because the connection provides high input impedance, voltage gain and a moderate output impedance. However the circuit a 180 out of phase output signal with regards to the input signal.
Common Drain Connection
Common Gate Connection
Applications of a JFET
1. Buffer Amplifier: Because a JFET has a high input impedance and a low output impedance. It can act as an excellent buffer amplifier. The high input impedance of a JFET means light loading of the preceding stage. This permits almost the entire output from the first stage to appear at the buffer input. On the other hand, the low output impedance of the JFET can drive heavy loads. This ensures that all the output from the buffer reaches the input of the second stage.
2. Phase Shift Oscillator
3. RF Amplifier: JFET is used in communication electronics instead of BJT for this reasons:
A. It has a low noise level
B. It is a voltage controlled device, therefore the current from the weak signal is not responsive.
The main drawback of JFET is that its gate must be reversed biased for proper operation of the device. This means that it can only have a negative gate operation for an n - channel and a positive gate operation for a p - channel. This means that one can only decrease the width of the channel from its zero bias and this type of operation is referred to as DEPLETION MODE.
Thus a JFET can only be operated in depletion mode.
However, there is an FET (Field Effect Transistor) that can be operated to enhance the width of the channel resulting o enhancement, such an FET is called MOSFET and the mode is known as ENHANCEMENT MODE.
Merits of MOSFET (Metallic Oxide Semiconductor FET) over JFET are:
1. Low Cost of Production
2. High Input Impedance
There are two basic types of MOSFET which are:
1. D-MOSFET: This MOSFET can operate in both enhancement and depletion modes.
2. E-MOSFET: This MOSFET can operate in only enhancement mode.
A MOSFET like a JFET has 3 basic terminals which are the gate, source and drain. The substrate is connected the source internally.
Since the gate is insulated from the channel one can apply either positive or negative voltage to the gate. Therefore making it possible for D-MOSFET to be operated in both enhancement and depletion modes.
It is worthy to note that the E-MOSFET has no channel between the source and drain unlike the D-MOSFET. The substrate extends completely to the SiO2 layer so that no channel exists. The E-MOSFET requires a proper gate voltage to form a channel.
Note that since gate is insulated from the channel, the MOSFET is sometimes called INSULATED GATE FET.
Take for example an n - channel D-MOSFET, the gate, SiO2 layer and the channel form a capacitor where one plate is the gate, the dielectric is the metal oxide semiconductor (SiO2 layer) and the other plate is the channel.
When gate voltage is changed, the electric field of the capacitor changes which in turn changes the resistance of the n - channel D-MOSFET.
As said earlier, the gate is insulated from the channel thus, one can apply either a negative or positive voltage to the gate.
The application of a negative voltage to the gate results to a depletion mode while the application of a positive voltage to the gate results to an enhancement mode.
Depletion Mode
Since the gate is negative, it means that electrons are on the gate. These electrons repel the free electrons in the n - channel, leaving a layer of positive ions in a part of the channel. Through this, one (operator) has depleted the n - channel of some of its free electrons. Therefore, lesser number of free electrons are made available for current conduction through the n - channel. This is similar to increase in the resistance of the channel. The greater the negative voltage on the gate, the lesser the current from source to drain. Thus by changing the negative voltage on the gate, one (operator) can vary the resistance of the n - channel and hence the current from source to drain.
Enhancement Mode
Since the gate is positive, it induces negative charges in the n - channel. These negative charges are free electrons drawn to the channel. Because these free electrons are added to those electrons already in the channel, the total number of free electrons in the channel is increased. Therefore, the greater the positive voltage applied to the gate the lesser the resistance at the channel and the more current moving from the source to drain.
Possible Biasing of D-MOSFET are:
1. Gate Bias
2. Self Bias
3. Voltage Divider Bias
4. Zero Bias
Possible Biasing of E-MOSFET are:
1. Drain Feedback Bias
2. Voltage Divider Bias
When two crystals of different materials first make contact there will be a flow of electrons from one to another. This is because the electrons meeting the junction from one side will generally have more energy than those meeting if from the other side.
If the work function of material A (φA) is less than the work function of material B (φB) electrons will move from material A to material B because the amount of energy required to release electrons in material A is lesser than that of material B. Also note that the work function of a material determines the depth of the conduction band of metals.
The release of electrons in material A makes it positively charged and material B negatively charged because it receives the electrons. The flow of electrons continues until the fermi levels of material A and material B are equal and then the flow can be either from material A to B or material B to A.Potential Difference, VAB = φB - φA volts. This is also known as the contact potential. This potential has to be surpassed in order to move electrons from material A to material B.
Metal to Semiconductor Contacts
n - type Semiconductor with φm < φs
If the work function of the metal is less than the work function of the semiconductor (φm < phis), it implies that electrons flow from the metal to the semiconductor and this type of contact is popularly known as the ohmic contact. Note that the contact potential (φs - φm) is unaffected by the applied voltage and the height of the conduction band of the semiconductor is denoted by x also known as the electron affinity.
n - type semiconductor with φm > φs
If the work function of the metal is greater than the work function of the semiconductor (φm > φs), it implies that electrons flow from the semiconductor to the metal. In this case current flow depends on the magnitude and polarity of the applied voltage (V). If is the current from the semiconductor to the metal. Io is the current from the metal to the semiconductor. I = If - Io, for zero bias where V = 0, there is no net current therefore If = I.
If the contact is forward biased, the semiconductor is biased negatively with respect to the metal. The energy of all the electrons in the semiconductor is raised and the potential barrier is reduced (φ - V). Thus, the depletion layer is reduced, more electrons can now diffuse from the semiconductor to the metal and If becomes greater than Io.
If the contact is reverse biased, the semiconductor is biased positively with respect to the metal. The energy of the electrons in the semiconductor is lowered and the potential barrier is raised to φ + V. This greatly reduces the diffusion of electrons from the semiconductor and If tends to zero. Electrons are drawn away from the junction so that more donor atoms are uncompensated and the depletion layer increases. However φm - x is still unaffected so that Io remains unchanged. The junction is said to be reverse biased and when If tends to zero, I = -To. This junction therefore acts as a rectifying contact. The application of rectifying contact is in the fabrication of schottky barrier diode or 'hot carrier' used in microwave.
n+ - type semiconductor with φm > φs
This is a special case of n - type semiconductor with φm > phis. If the n - region is so heavily doped that it becomes degenerate with the fermi level within conduction band just as a metal, the metal - n+ contact becomes similar to the contact between two metals and is therefore ohmic even when φm > φs. This feature is used in fabricating the contact used for making connections to integrated circuits.
p - type semiconductor with φm < φs
The initial flow of electrons is from metal to semiconductor so that a positive charge is formed on the metal and a negative charge is formed on the semiconductor. The electrons are captured by acceptor atoms near the junction and a depletion layer of width is formed. This contact is rectifying and forward bias occurs with the semiconductor positive which reduces the potential barrier, φ - V. Reverse bias occurs with the semiconductor negative which increases the potential barrier, φ + V. so that If (current from semiconductor to metal) tends to zero and Io (current from metal to semiconductor) remains constant
p - type semiconductor with φm > φs
The initial flow of electrons is from the semiconductor to the metal. This results in a surface charge of electrons in the metal and a surface charge of holes in the semiconductor. In this case, there is no depletion layer and external bias does not affect the contact potential, φm - φs. Finally when the two materials have ascertained an equal fermi level, there is a free flow of holes in either direction. After all said and done, this contact is ohmic.
For material contacts between both n - type and p - type materials, Io increases with temperature since it is due to thermally generated carriers.
A pn junction is formed by allowing a group III material to diffuse into an n - type region at high temperatures.
An np junction would be formed by diffusion of a group V material into a p - region.
As stated earlier, a circuit with which the waveform of the applied signal is shaped or removed is known as a clipping circuit.
A biased negative clipping circuit is a circuit that removes a small portion of the negative half cycle of the signal voltage.
Operation of a Biased Negative Clipper:
During
the positive half cycle, the diode remains reverse biased which makes
it an open. Therefore, there will be no flow of current through it,
thereby making the entire the positive half cycle to appear across the
load.
During the negative half cycle, the diode conducts heavily as long as the input voltage is less than -V with respect to polarity.
When
the input voltage is lesser than -V, the diode behaves as a short,
thereby blocking an waveform from entering or appearing across the load.
For this reason, the output will remain -V as long as the input voltage is less than -V.
If
the input voltage becomes greater than -V, the diode becomes reversed
biased and returns to being an open, thereby pushing the input voltage
across the load.
In this way, the biased negative clipper removes the input voltage lesser than -V.
A combination clipper is a circuit the combines a biased negative clipper and a biased positive clipper.
When battery VBB is turned on, the capacitor C charges through resistor R1. During the charging period the voltage across the capacitor rises in an exponential manner until it reaches the peak point voltage. At this instant of time the UJT switches to its low resistance conducting mode and the capacitor is discharged between E and B1. As the capacitor voltage flies back to zero, the emitter ceases to conduct and the UJT is switched off. The next cycle then begins allowing the capacitor C to charge again. The frequency of the output saw tooth wave can be varied by changing the value of R1 since this control the time constant (R1C) of the capacitor charging circuit.
A combination clipper is a circuit the combines a biased negative clipper and a biased positive clipper.
Combination Clipper
Operation of a Combination Clipper:
During the positive half cycle, if the input voltage is greater than +V1, the diode D1 conducts and becomes a short while the diode D2 is reverse biased and does not conduct.
The output voltage remains +V1 as long as the input voltage is greater than +V1.
When the input voltage then becomes less than +V1, the diode D1
becomes reverse biased, thereby being an open (ie no current passes
through it), since the diode D2 is already reverse biased, the input
voltage now appears across the load.
On the other hand, during the negative half cycle, if the input voltage is lesser than -V2 with respect to the polarity, the diode D2 conducts and becomes a short while the diode D1 is reverse biased and does not conduct.
The output voltage remains -V2 as long as the input voltage is lesser than -V2.
When the input voltage then becomes greater than -V2, the diode D2 becomes reverse biased and open, thereby not allowing current to pass through it, since the diode D1 is already reverse biased, the input voltage of the negative cycle now appears across the load.
Note that +V1 and -V2 each appears to be constant on the output voltage and the reason is because they are DC voltages (discrete) and not continuous like the AC signal.
A clamping circuit is a circuit that places either the positive or negative peak of a signal at a desired d.c. level.
A clamping circuit does not change the peak to peak or root mean square value of a waveform.
The operation of a clamper or clamping circuit is based on the principle that charging time of a capacitor is made very small as compared to its discharging time.
In a practical clamping circuit, the values of C and RL are chosen that discharging is very large.
Operation of a Positive Clamper:
Operation of the Unijunction Transistor:On the other hand, during the negative half cycle, if the input voltage is lesser than -V2 with respect to the polarity, the diode D2 conducts and becomes a short while the diode D1 is reverse biased and does not conduct.
The output voltage remains -V2 as long as the input voltage is lesser than -V2.
When the input voltage then becomes greater than -V2, the diode D2 becomes reverse biased and open, thereby not allowing current to pass through it, since the diode D1 is already reverse biased, the input voltage of the negative cycle now appears across the load.
Note that +V1 and -V2 each appears to be constant on the output voltage and the reason is because they are DC voltages (discrete) and not continuous like the AC signal.
A clamping circuit is a circuit that places either the positive or negative peak of a signal at a desired d.c. level.
A clamping circuit does not change the peak to peak or root mean square value of a waveform.
The operation of a clamper or clamping circuit is based on the principle that charging time of a capacitor is made very small as compared to its discharging time.
In a practical clamping circuit, the values of C and RL are chosen that discharging is very large.
Positive Clamper
Operation of a Positive Clamper:
First, the values of C and RL are selected such that the time constant (CRL) is very large where RL is the load resistance.
This
means that the voltage across the capacitor will not discharge
significantly during the interval the diode is non - conducting.
Second, the time constant is deliberately made much greater than the time period of the incoming signal.
During
the positive half cycle of the input signal, the diode is reverse
biased and behaves as an open. Since the discharging time constant is
much greater than the time period of the input signal, the capacitor
remains almost fully charged to V volts during the off time of the
diode.
During
the negative half cycle of the input signal, the diode is forward
biased and behaves as a short. Therefore, current passes through the
diode. The charging time constant is CRf where Rf is the forward resistance of the diode which is also very small so the capacitor charges to V volts quickly.
Therefore, during the positive half cycle of the input signal the output voltage is zero.
In
my own understanding, the capacitor = 0 before charging and after
charging during discharging it almost remains close to V. Therefore the
mid line of the signal at the output should be at V. Therefore, this
should explain why the at the output signal the input signal is pushed
upwards.
As stated in the previous post,
A clamping circuit is a circuit that places either the positive or negative peak of a signal at a desired d.c. level.
A clamping circuit does not change the peak to peak or root mean square value of a waveform.
The operation of a clamper or clamping circuit is based on the principle that charging time of a capacitor is made very small as compared to its discharging time.
In a practical clamping circuit, the values of C and RL are chosen that discharging is very large.
Operation of a Negative Clamper:
Therefore, the capacitor will charge to V volts quickly. Since the diode is short there is no output voltage during the positive half cycle of the input signal.
As stated in the previous post,
A clamping circuit is a circuit that places either the positive or negative peak of a signal at a desired d.c. level.
A clamping circuit does not change the peak to peak or root mean square value of a waveform.
The operation of a clamper or clamping circuit is based on the principle that charging time of a capacitor is made very small as compared to its discharging time.
In a practical clamping circuit, the values of C and RL are chosen that discharging is very large.
Operation of a Negative Clamper:
Negative Clamper
During
the positive half cycle of the input signal, the diode is forward
biased. Therefore, the diode behaves as a short. The charging time
constant (CRf) is very small where Rf is the forward resistance of the diode.
Therefore, the capacitor will charge to V volts quickly. Since the diode is short there is no output voltage during the positive half cycle of the input signal.
During
the negative half cycle of the input signal, the diode is reverse
biased and behaves as an open. Since the discharging constant (CRL)
is much greater than the time period of the input signal, the capacitor
almost remain fully charged to V volts during the off time of the
diode. RL is the load resistance.
To
clarify negative clamping well, I would say that before the charging of
the capacitor, the capacitor = 0. After the charging it becomes equal
to V volts. During the discharging since its time constant is longer
than the time period of the signal it almost remains at V volts.
Therefore, the mid - point of the amplitude of the signal is equal to V
volts in the negative direction.
A light emitting diode (LED) is a diode that gives off visible light when forward biased.
A LED gives off green light when manufactured using Gallium Phosphide and also gives off red light when manufactured using Gallium Arsenide.
When LED is forward biased, the electrons from the n - type material cross the pn junction and recombine with the holes in the p - type material.
Thus, free electrons are in the conduction band and at a higher energy level than the holes in the valence band.
When recombination takes place the electrons emit energy in the form of light and heat.
In Silicon and Germanium, during recombination most of the energy is given off in the form of heat and the energy emitted in the form of light is insufficient that is why Silicon and Germanium materials are not used in the production of light emitting diodes.
However, materials like Gallium Arsenide and Gallium Phosphide during recombination releases a sufficient amount of light energy to produce a quite intense visible light.
A unijunction transistor consists of an n - type silicon bar with an electrical connection on each end. The leads to these connections are called base leads, B1 and B2.
A pn junction is formed between a p - type emitter and the bar which is n - type.
Applications of a Unijunction Transistor are:
1. It can be used as a switching device.
2. It can be used as a pulse generator.
3. It can be used to produce saw tooth signals.
Note that a unijunction transistor is also called a double based diode because two base terminals are taken from one section of the diode. The emitter of a UJT is
heavily doped (having many holes) and the n - region is lightly doped which makes the resistance between the base terminal very high when the emitter lead is open.
Note that the resistance between the emitter and base B1 is greater than the resistance between the emitter and base B2 because the emitter is nearer to B2 as compared to B1. Since the emitter is located nearer to B2 then half of VBB appears between the emitter and B1.
Operation of a Unijunction Transistor:
If a positive voltage is applied to the emitter the pn junction will remain reverse biased as long as the input voltage is less than VP (≈ V1). When the input voltage then becomes greater than VP (≈ V1), the pn junction now becomes forward biased and holes are injected from the p - type material to the n - type bar. These holes are repelled by positive B2 terminal and are attracted towards B1 terminal of the bar. The accumulation of holes in the emitter to B1 results in the decrease of resistance in the section of the bar. This also results to the internal voltage drop from emitter to B1 and hence emitter current is increased thereby exhibiting negative resistance. At the this negative resistance region, the UJT does not obey Ohm's law because voltage decreases while current increases.
As more holes are injected a condition of saturation (the UJT now begins to obey Ohm's law ===> as voltage increases, current increases) is eventually reached and the emitter current is now only limited by the emitter power supply. [THE DEVICE IS KNOWN TO BE IN ITS 'ON' STATE].
If a negative power is applied to the emitter, the pn junction is reversed biased and the emitter current is cut off. [THE DEVICE IS KNOWN TO BE IN ITS 'OFF' STATE].
Note that the resistance of the silicon bar is known as the interbase resistance, RBB.
RB1 is variable because its value depends on the bias voltage.
With no voltage applied, RBB = RB1 + RB2
Voltage across RB1, V1 = RB1(VBB) / (RB1 + RB2)
Intrinsic Stand Off Ratio, η = V1 / VBB = RB1 / (RB1 + RB2)
Peak Point Voltage, VP = ηVBB + VD
Note that in the cut off region as VE increases from zero slight leakage current flows from terminals B2 to the emitter and the current is due to minority carriers in the reverse biased diode.
The valley point voltage is that voltage at which saturation begin to occur in a unijunction transistor.
It is also worthy to note that the difference between the peak point voltage and the valley point voltage is a measure of the switching efficiency of unijunction transistor and can be seen to fall off as VBB decreases.
There are three regions of a unijunction transistor (UJT):
1. Cut Off Region
2. Negative Resistance Region
3. Saturation Region.
Advantages of a Unijunction Transistor (UJT):
1. It is a low cost device
2. It has excellent characteristics
3. It is a low power absorbing device under normal operating conditions.
A light emitting diode (LED) is a diode that gives off visible light when forward biased.
A LED gives off green light when manufactured using Gallium Phosphide and also gives off red light when manufactured using Gallium Arsenide.
When LED is forward biased, the electrons from the n - type material cross the pn junction and recombine with the holes in the p - type material.
Thus, free electrons are in the conduction band and at a higher energy level than the holes in the valence band.
When recombination takes place the electrons emit energy in the form of light and heat.
In Silicon and Germanium, during recombination most of the energy is given off in the form of heat and the energy emitted in the form of light is insufficient that is why Silicon and Germanium materials are not used in the production of light emitting diodes.
However, materials like Gallium Arsenide and Gallium Phosphide during recombination releases a sufficient amount of light energy to produce a quite intense visible light.
LED
The intensity of radiated light is directly proportional to the forward current of LED.
LED Symbol
LED has a safe value of operation and beyond that safe value it destroys.
Therefore,
in order that current through the LED does not exceed the safe value, a
resistor Rs is connected in series to the LED.
LED connected to resistor Rs
Safety Equations of LED:
VD is the voltage across the LED
Vs is the input voltage
Voltage across Rs = Vs - VD
Circuit Current, If = (Vs - VD) / Rs
Advantages of LED:
It requires a low voltage.
It has a longer life.
It exhibits fast ON - OFF switching
LED has a low reverse voltage rating.
Therefore, one must be careful not to use LEDs with a high level of reverse bias.
One way to protect a LED is to connect a rectifier diode in parallel with LED. If reverse voltage greater than the reverse voltage rating of LED is accidentally applied, the rectifier diode will be turned ON. This protects the LED from damage.
A unijunction transistor is a
three terminal, one pn junction switching device with a unique
characteristic which when triggered, the emitter current increases
regeneratively until its limited by emitter power supply.Advantages of LED:
It requires a low voltage.
It has a longer life.
It exhibits fast ON - OFF switching
LED has a low reverse voltage rating.
Therefore, one must be careful not to use LEDs with a high level of reverse bias.
One way to protect a LED is to connect a rectifier diode in parallel with LED. If reverse voltage greater than the reverse voltage rating of LED is accidentally applied, the rectifier diode will be turned ON. This protects the LED from damage.
LED connected to a Rectifier Diode
Multicolour LED
A LED that emits one colour when forward biased and another colour when reverse biased is know ans a multicolour LED.
Multicolor
LEDs actually contain two pn junctions that are connected in reverse -
parallel that is they are in parallel with the anode of one connected to
the cathode of the other.
Multicolour LED
If
a positive potential is applied at the terminal by the left, the pn
junction on top is forward biased and light emits from the LED but the
pn junction below is reverse biased and current does not pass through.
If
the potential is reverse, the pn junction at the bottom is now forward
biased and light emits from the LED but the pn junction on top is
reverse biased and current does not pass through.
Note that LED is useful as an indicator and not for illumination.
Two Primary Applications of LED:
1. Power Indicator
2. Seven Segment Display
A varactor diode is a pn junction that acts as a variable capacitor under changing reverse bias.
A varactor diode may be considered as a capacitor with n - region and p - region forming oppositely charged plates and with depletion layer acting as a dielectric.
Therefore, a varactor diode is constructed to have high capacitance under reverse bias range.
Conventionally, a varactor diode is always reverse biased.
Total Capacitance, CT = εA/Wd where:
A represents the cross sectional area.
Wd represents the width of the depletion layer.
When reverse voltage across a varactor diode is increased, the width of the depletion layer increases. Therefore, the total junction capacitance reduces.
On the other hand, if the reverse voltage across a varactor diode is lowered, the width of the depletion layer lowers. Therefore, the total junction capacitance increases.
For this very effect a varactor diode is sometimes called a voltage controlled capacitor which maakes it useful in voltage controlled tuning.
Voltage - Controlled Tuning using a Varactor Diode
A varactor diode is a pn junction that acts as a variable capacitor under changing reverse bias.
A varactor diode may be considered as a capacitor with n - region and p - region forming oppositely charged plates and with depletion layer acting as a dielectric.
Varactor Diode Symbol
Varactor Diode
Therefore, a varactor diode is constructed to have high capacitance under reverse bias range.
Conventionally, a varactor diode is always reverse biased.
Total Capacitance, CT = εA/Wd where:
A represents the cross sectional area.
Wd represents the width of the depletion layer.
When reverse voltage across a varactor diode is increased, the width of the depletion layer increases. Therefore, the total junction capacitance reduces.
On the other hand, if the reverse voltage across a varactor diode is lowered, the width of the depletion layer lowers. Therefore, the total junction capacitance increases.
For this very effect a varactor diode is sometimes called a voltage controlled capacitor which maakes it useful in voltage controlled tuning.
Voltage - Controlled Tuning using a Varactor Diode
As we explained earlier, a varactor diode which exhibits variable capacitance can be used for voltage controlled tuning.
In the circuit above, the resistance R1 is the winding resistance of the inductor. The winding resistance is in series with the potentiometer, R2.
Therefore,
the winding resistance of the inductor and the potentiometer form a
voltage divider that is used to determine the amount of reverse bias
across the varactor diode D1 and therefore, its capacitance
because an increase in reverse voltage leads to a wider depletion layer
which also results to a lesser capacitance vice versa.
Thus
by adjusting the setting of the potentiometer, one can vary the diode
capacitance which in turn varies the resonant frequency of the LC
circuit.
Resonant Frequency = 1 / 2π(LC)1/2
If the amount of varactor reverse bias is decreased the value of C of the varactor increases. The increase in C will cause the resonant frequency of the circuit to increase.
Therefore, a decrease in the reverse bias voltage causes a decrease in the resonant frequency implying that the reverse bias voltage is directly proportional to the resonant frequency and inversely proportional to the capacitance.
If the amount of varactor reverse bias is decreased the value of C of the varactor increases. The increase in C will cause the resonant frequency of the circuit to increase.
Therefore, a decrease in the reverse bias voltage causes a decrease in the resonant frequency implying that the reverse bias voltage is directly proportional to the resonant frequency and inversely proportional to the capacitance.
A unijunction transistor consists of an n - type silicon bar with an electrical connection on each end. The leads to these connections are called base leads, B1 and B2.
A pn junction is formed between a p - type emitter and the bar which is n - type.
Applications of a Unijunction Transistor are:
1. It can be used as a switching device.
2. It can be used as a pulse generator.
3. It can be used to produce saw tooth signals.
Note that a unijunction transistor is also called a double based diode because two base terminals are taken from one section of the diode. The emitter of a UJT is
heavily doped (having many holes) and the n - region is lightly doped which makes the resistance between the base terminal very high when the emitter lead is open.
Note that the resistance between the emitter and base B1 is greater than the resistance between the emitter and base B2 because the emitter is nearer to B2 as compared to B1. Since the emitter is located nearer to B2 then half of VBB appears between the emitter and B1.
Operation of a Unijunction Transistor:
If a positive voltage is applied to the emitter the pn junction will remain reverse biased as long as the input voltage is less than VP (≈ V1). When the input voltage then becomes greater than VP (≈ V1), the pn junction now becomes forward biased and holes are injected from the p - type material to the n - type bar. These holes are repelled by positive B2 terminal and are attracted towards B1 terminal of the bar. The accumulation of holes in the emitter to B1 results in the decrease of resistance in the section of the bar. This also results to the internal voltage drop from emitter to B1 and hence emitter current is increased thereby exhibiting negative resistance. At the this negative resistance region, the UJT does not obey Ohm's law because voltage decreases while current increases.
As more holes are injected a condition of saturation (the UJT now begins to obey Ohm's law ===> as voltage increases, current increases) is eventually reached and the emitter current is now only limited by the emitter power supply. [THE DEVICE IS KNOWN TO BE IN ITS 'ON' STATE].
If a negative power is applied to the emitter, the pn junction is reversed biased and the emitter current is cut off. [THE DEVICE IS KNOWN TO BE IN ITS 'OFF' STATE].
Note that the resistance of the silicon bar is known as the interbase resistance, RBB.
RB1 is variable because its value depends on the bias voltage.
With no voltage applied, RBB = RB1 + RB2
Voltage across RB1, V1 = RB1(VBB) / (RB1 + RB2)
Intrinsic Stand Off Ratio, η = V1 / VBB = RB1 / (RB1 + RB2)
Peak Point Voltage, VP = ηVBB + VD
Note that in the cut off region as VE increases from zero slight leakage current flows from terminals B2 to the emitter and the current is due to minority carriers in the reverse biased diode.
The valley point voltage is that voltage at which saturation begin to occur in a unijunction transistor.
It is also worthy to note that the difference between the peak point voltage and the valley point voltage is a measure of the switching efficiency of unijunction transistor and can be seen to fall off as VBB decreases.
There are three regions of a unijunction transistor (UJT):
1. Cut Off Region
2. Negative Resistance Region
3. Saturation Region.
Advantages of a Unijunction Transistor (UJT):
1. It is a low cost device
2. It has excellent characteristics
3. It is a low power absorbing device under normal operating conditions.
When battery VBB is turned on, the capacitor C charges through resistor R1. During the charging period the voltage across the capacitor rises in an exponential manner until it reaches the peak point voltage. At this instant of time the UJT switches to its low resistance conducting mode and the capacitor is discharged between E and B1. As the capacitor voltage flies back to zero, the emitter ceases to conduct and the UJT is switched off. The next cycle then begins allowing the capacitor C to charge again. The frequency of the output saw tooth wave can be varied by changing the value of R1 since this control the time constant (R1C) of the capacitor charging circuit.
VC = VBB(1 - e-t/R1C)
The discharge of the capacitor occurs when VC is equal to the peak point voltage ηVBB.
ηVBB = VBB(1 - e-t/R1C)
η = 1 - e-t/R1C
e-t/R1C = 1 - η
t = R1Cloge1/(1 - η)
t = 2.3R1Clog101/(1 - η)
A junction field effect transistor
is a type of field effect transistor and a three terminal semiconductor
device in which current conduction is by one type of carrier (electrons
or holes).The discharge of the capacitor occurs when VC is equal to the peak point voltage ηVBB.
ηVBB = VBB(1 - e-t/R1C)
η = 1 - e-t/R1C
e-t/R1C = 1 - η
t = R1Cloge1/(1 - η)
t = 2.3R1Clog101/(1 - η)
In a JFET, the current conduction is either by electrons or holes and is controlled by means of an electric field between the gate electrode and the conducting channel of the device.
Note that the JFET has a high input impedance and a low noise level (because there are no junctions as in an ordinary transistor, conduction is through an n - type or p - type semiconductor material).
The three terminals of a JFET are:
1. Gate
2. Drain
3. Source
The voltage betwee the gate and the source is such that the gate is reverse biased and the drain and source terminals are interchangeable
It is worthy to note the following points:
1. The input circuit (gate to source) of a JFET is reversed biased which means that the JFET has a high input impedance.
2. The drain is so biased with the source that the drain current ID flows from the source to drain.
3. In all JFETs, source current IS is equal to the drain current ID.
4. The input voltage (VGS) controls the output current.
5. JFET is not subjected to thermal runaway when temperature increases, the drain current (ID) is controlled by the changing channel width.
Working Principle of a Junction Field Effect Transistor (JFET)
The two pn junctions at the sides of a JFET form the two depletion layers and the conduction by charge carriers (ie free electrons because we are dealing with n - channel JFET) is through the channel between the two depletion layers and out of drain.
The width and hence the resistance of this channel can be controlled by changing the input voltage, VGS. The greater the reverse voltage VGS, the wider the depletion layers and the narrower the conduction channel.
The narrower the conduction channel means greater resistance and hence source to drain current decreases while the wider the conduction channel means lesser resistance and hence source to drain current increases.
Therefore, the JFET operates on the principle that width and hence resistance of the conducting channel can be varied by changing the reverse voltage, VGS.
In other words, the magnitude of the drain current, ID can be changed by altering VGS.
When a voltage, VDS is applied between drain and source terminals and voltage on the gate is zero, the two pn junctions at the sides of the bar establishes depletion layers. The electrons will flow from source to drain through a channel between the depletion layers. The size of these layers determines the width of the channel and hence the current conduction through the bar.
If the reverse voltage, VGS is continuously increased, a state is reached when two depletion layers touch each other and the channel is cut off. Under such conditions, the channel becomes a non conductor (insulator).
Differences Between JFET (Junction Field Effect Transistor) and BJT (Bipolar Junction Transistor)
JFET
1. Unipolar transistor
2. Voltage controlled device
3. Its terminals are gate, source and drain
4. Its input circuit is reverse biased
5. It has a high input impedance
6. No current enters the gate of a JFET
7. Noise level is very small
8. Its gain is characterised by transconductance which is ratio of change in output current (ID) to input voltage (VGS).
BJT
1. Bipolar transistor
2. Current controlled device
3. Its terminals are emitter, base and collector
4. Its input circuit is forward biased
5. It has a low input impedance
6. Few currents enter into the base of a BJT
7. Noise level is moderate
8. Its gain is characterised by current gain
The curve between the drain current (ID) and drain source voltage (VDS) of a JFET at constant gate source voltage (VGS) is known as the output characteristics of a JFET.
Note that at first, the drain current (ID) rises rapidly with the drain source voltage (VDS) but then becomes constant. The drain source voltage above which the drain current becomes constant is known as PINCH OFF VOLTAGE.
After pinch off voltage the channel width becomes so narrow that depletion layers almost touch each other and the drain current passes through the small passage between these layers. Thus, increase in drain current is very small with VDS above pinch off voltage. Consequently the drain current (ID) remains constant.
Operation of a JFET as an amplifier
During the positive half cycle of the input signal, the reverse bias voltage on the gate decreases which increases the channel width and hence the drain current.
During the negative half cycle of the input signal, the reverse bias voltage on the gate increases which decreases the channel width and hence the drain current.
The result is that a small change in the voltage at the gate produces a large change in drain current. These large variations in drain current produces large output across the load RL.
In summary, this is how a JFET (Junction Field Effect Transistor) acts an amplifier.
There are several parameters describing a JFET but am going to present these:
1. Shorted Gate Drain Current (IDSS)
2. Pinch Off Voltage (VP)
3. Gate Source Cut Off Voltage VGS(off)
4. a.c. Drain Resistance
5. Transconductance
6. Amplification Factor
Shorted Gate Drain Current (IDSS)
This is the drain current with source short circuited to gate (ie VGS = 0) and drain voltage (VDS) equal to the pinch off voltage. This is sometimes called Zero Bias Current. When VDS is increased beyond VP, the depletion layers expand at the top of the channel. The channel therefore, now acts as a current limiter and holds drain current constant at IDSS.
Note that since IDSS is measured under shorted gate conditions. It is the maximum drain current that one can get with normal operation of JFET.
There is a maximum drain voltage VDS(max) that can be applied to a JFET. If the drain voltage exceeds VDS(max) the JFET would breakdown.
The region between VP and VDS(max) is called constant current region or active region. In active region, JFET behaves as a constant current device. For proper working of JFET it must be operated in the active region.
Pinch Off Voltage (VP)
This is the maximum drain source voltage at which the drain current becomes essentially constant.
Gate Source Cut Off Voltage VGS(off)
This is the gate source voltage where the channel is completely cut off and the drain current becomes zero.
VGS(off) will always have the same magnitude value as VP. For Example if VP = 6V, VGS(off) = -6V.
a.c. Drain Resistance
This is the ratio of change in drain source voltage (ΔVDS) to the change in drain current (ΔID) at a constant gate source voltage
Equation ===> ΔVGS/ΔID at constant VGS
Transconductance
This is the ratio of the change in drain current (ΔID) to the change in gate source voltage (ΔVGS) at constant drain source voltage.
Equation ===> ΔID/ΔVGS at constant VDS
Amplification Factor
This is the ratio of change in the drain source voltage (ΔVDS) to the change in the gate source voltage (ΔVGS) at constant drain current.
Amplification factor of a JFET indicates how much control the gate voltage has over drain current than the drain voltage.
Equation ===> ΔVDS/ΔVGS
It is worthy to note this equations
ID = IDSS(1 - (VGS/VGS(off)))²
gm = gmo[1 - (VGS/VGS(off))]²
gmo = 2IDSS/|VGS(off)|
There are two basic types of JFET biasing which are:
1. Bias Battery
2. Biasing Circuit
Bias Battery
This method is also called a gate bias. The battery voltage, VGG ensures that gate source junction remains reverse biased. In this gate bias method there is no gate current therefore there will be no voltage drop across RG. It is also known as a fixed biasing circuit.
Biasing Circuit
The biasing circuit uses the supply voltage VDD to provide the necessary bias.
There are two commonly used methods which are:
1. Self Bias
2. Potential Divider Bias
Self Bias
In self bias the resistor, RS is the bias resistor. The d.c. component of drain current flowing through RS produces the desired bias voltage.
Voltage across RS, VS = IDRS
Since the gate current is negligibly small, the gate terminal is at d.c. ground is VG = 0.
VGS = VG - VS
= 0 - VS
= -IDRS
Thus bias voltage VGS keeps gate negative with respect to source.
Midpoint - Bias: When a signal is applied, the midpoint bias allows a maximum current of drain current swing between IDSS and 0. It can be proved that when VGS = VGS(off)/3.4, midpoint bias conditions are obtained.
Potential Divider Bias
The resistors R1 and R2 forms a voltage divider across drain supply, VDD. The circuit is so designed that IDRS is larger than V2 so that VGS is negative which provides the correct bias voltage.
V2 = VG = VDD(RS)/(R1 + R2)
V2 = VGS + IDRS
VGS = V2 - IDRS
The biasing circuit provides good stability of the operating points.
There are 3 basic connections of a JFET which are:
1. Common Source Connection
2. Common Drain Connection
3. Common Gate Connection
Common Source Connection
This is the most widely used connection because the connection provides high input impedance, voltage gain and a moderate output impedance. However the circuit a 180 out of phase output signal with regards to the input signal.
Common Drain Connection
Common Gate Connection
Applications of a JFET
1. Buffer Amplifier: Because a JFET has a high input impedance and a low output impedance. It can act as an excellent buffer amplifier. The high input impedance of a JFET means light loading of the preceding stage. This permits almost the entire output from the first stage to appear at the buffer input. On the other hand, the low output impedance of the JFET can drive heavy loads. This ensures that all the output from the buffer reaches the input of the second stage.
2. Phase Shift Oscillator
3. RF Amplifier: JFET is used in communication electronics instead of BJT for this reasons:
A. It has a low noise level
B. It is a voltage controlled device, therefore the current from the weak signal is not responsive.
The main drawback of JFET is that its gate must be reversed biased for proper operation of the device. This means that it can only have a negative gate operation for an n - channel and a positive gate operation for a p - channel. This means that one can only decrease the width of the channel from its zero bias and this type of operation is referred to as DEPLETION MODE.
Thus a JFET can only be operated in depletion mode.
However, there is an FET (Field Effect Transistor) that can be operated to enhance the width of the channel resulting o enhancement, such an FET is called MOSFET and the mode is known as ENHANCEMENT MODE.
Merits of MOSFET (Metallic Oxide Semiconductor FET) over JFET are:
1. Low Cost of Production
2. High Input Impedance
There are two basic types of MOSFET which are:
1. D-MOSFET: This MOSFET can operate in both enhancement and depletion modes.
2. E-MOSFET: This MOSFET can operate in only enhancement mode.
A MOSFET like a JFET has 3 basic terminals which are the gate, source and drain. The substrate is connected the source internally.
Since the gate is insulated from the channel one can apply either positive or negative voltage to the gate. Therefore making it possible for D-MOSFET to be operated in both enhancement and depletion modes.
It is worthy to note that the E-MOSFET has no channel between the source and drain unlike the D-MOSFET. The substrate extends completely to the SiO2 layer so that no channel exists. The E-MOSFET requires a proper gate voltage to form a channel.
Note that since gate is insulated from the channel, the MOSFET is sometimes called INSULATED GATE FET.
Take for example an n - channel D-MOSFET, the gate, SiO2 layer and the channel form a capacitor where one plate is the gate, the dielectric is the metal oxide semiconductor (SiO2 layer) and the other plate is the channel.
When gate voltage is changed, the electric field of the capacitor changes which in turn changes the resistance of the n - channel D-MOSFET.
As said earlier, the gate is insulated from the channel thus, one can apply either a negative or positive voltage to the gate.
The application of a negative voltage to the gate results to a depletion mode while the application of a positive voltage to the gate results to an enhancement mode.
Depletion Mode
Since the gate is negative, it means that electrons are on the gate. These electrons repel the free electrons in the n - channel, leaving a layer of positive ions in a part of the channel. Through this, one (operator) has depleted the n - channel of some of its free electrons. Therefore, lesser number of free electrons are made available for current conduction through the n - channel. This is similar to increase in the resistance of the channel. The greater the negative voltage on the gate, the lesser the current from source to drain. Thus by changing the negative voltage on the gate, one (operator) can vary the resistance of the n - channel and hence the current from source to drain.
Enhancement Mode
Since the gate is positive, it induces negative charges in the n - channel. These negative charges are free electrons drawn to the channel. Because these free electrons are added to those electrons already in the channel, the total number of free electrons in the channel is increased. Therefore, the greater the positive voltage applied to the gate the lesser the resistance at the channel and the more current moving from the source to drain.
Possible Biasing of D-MOSFET are:
1. Gate Bias
2. Self Bias
3. Voltage Divider Bias
4. Zero Bias
Possible Biasing of E-MOSFET are:
1. Drain Feedback Bias
2. Voltage Divider Bias
When two crystals of different materials first make contact there will be a flow of electrons from one to another. This is because the electrons meeting the junction from one side will generally have more energy than those meeting if from the other side.
If the work function of material A (φA) is less than the work function of material B (φB) electrons will move from material A to material B because the amount of energy required to release electrons in material A is lesser than that of material B. Also note that the work function of a material determines the depth of the conduction band of metals.
The release of electrons in material A makes it positively charged and material B negatively charged because it receives the electrons. The flow of electrons continues until the fermi levels of material A and material B are equal and then the flow can be either from material A to B or material B to A.Potential Difference, VAB = φB - φA volts. This is also known as the contact potential. This potential has to be surpassed in order to move electrons from material A to material B.
Metal to Semiconductor Contacts
n - type Semiconductor with φm < φs
If the work function of the metal is less than the work function of the semiconductor (φm < phis), it implies that electrons flow from the metal to the semiconductor and this type of contact is popularly known as the ohmic contact. Note that the contact potential (φs - φm) is unaffected by the applied voltage and the height of the conduction band of the semiconductor is denoted by x also known as the electron affinity.
n - type semiconductor with φm > φs
If the work function of the metal is greater than the work function of the semiconductor (φm > φs), it implies that electrons flow from the semiconductor to the metal. In this case current flow depends on the magnitude and polarity of the applied voltage (V). If is the current from the semiconductor to the metal. Io is the current from the metal to the semiconductor. I = If - Io, for zero bias where V = 0, there is no net current therefore If = I.
If the contact is forward biased, the semiconductor is biased negatively with respect to the metal. The energy of all the electrons in the semiconductor is raised and the potential barrier is reduced (φ - V). Thus, the depletion layer is reduced, more electrons can now diffuse from the semiconductor to the metal and If becomes greater than Io.
If the contact is reverse biased, the semiconductor is biased positively with respect to the metal. The energy of the electrons in the semiconductor is lowered and the potential barrier is raised to φ + V. This greatly reduces the diffusion of electrons from the semiconductor and If tends to zero. Electrons are drawn away from the junction so that more donor atoms are uncompensated and the depletion layer increases. However φm - x is still unaffected so that Io remains unchanged. The junction is said to be reverse biased and when If tends to zero, I = -To. This junction therefore acts as a rectifying contact. The application of rectifying contact is in the fabrication of schottky barrier diode or 'hot carrier' used in microwave.
n+ - type semiconductor with φm > φs
This is a special case of n - type semiconductor with φm > phis. If the n - region is so heavily doped that it becomes degenerate with the fermi level within conduction band just as a metal, the metal - n+ contact becomes similar to the contact between two metals and is therefore ohmic even when φm > φs. This feature is used in fabricating the contact used for making connections to integrated circuits.
p - type semiconductor with φm < φs
The initial flow of electrons is from metal to semiconductor so that a positive charge is formed on the metal and a negative charge is formed on the semiconductor. The electrons are captured by acceptor atoms near the junction and a depletion layer of width is formed. This contact is rectifying and forward bias occurs with the semiconductor positive which reduces the potential barrier, φ - V. Reverse bias occurs with the semiconductor negative which increases the potential barrier, φ + V. so that If (current from semiconductor to metal) tends to zero and Io (current from metal to semiconductor) remains constant
p - type semiconductor with φm > φs
The initial flow of electrons is from the semiconductor to the metal. This results in a surface charge of electrons in the metal and a surface charge of holes in the semiconductor. In this case, there is no depletion layer and external bias does not affect the contact potential, φm - φs. Finally when the two materials have ascertained an equal fermi level, there is a free flow of holes in either direction. After all said and done, this contact is ohmic.
For material contacts between both n - type and p - type materials, Io increases with temperature since it is due to thermally generated carriers.
A pn junction is formed by allowing a group III material to diffuse into an n - type region at high temperatures.
An np junction would be formed by diffusion of a group V material into a p - region.
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